The present invention relates to a semiconductor device, and particularly to a MOS integrated circuit which comprises an input protection circuit in order to prevent a destruction even from occurring on the gate of the MOS transistor.
The MOS integrated circuit normally provides an input protection circuit in order to prevent a destruction event from occurring on the gate of the MOS transistor, wherein the MOS transistor is located at the primary stage of the internal circuit which is provided inside of the MOS integrated circuit. A destruction event is caused by static electricity or abnormal voltage input such as excessive voltage which is applied to the MOS integrated circuit by mistake. The input protection circuit acts as the protection circuit which performs voltage clamping by releasing an electric current against the abnormal voltage input so as to avoid an event in which the relatively large voltage is applied to the gate of the MOS transistor. The input protection circuit can be realized simply by a diode (or diodes) by which the voltage clamping is performed against the positive or negative abnormal voltage input. The input protection circuit can also be configured by a MOS transistor (or MOS transistors). In that MOS transistor, a parasitic component (e.g., parasitic diode or parasitic bipolar transistor) is turned on responsive to the abnormal voltage input. Hence, by using this property of the parasitic component provided in the MOS transistor, the electric current is released in response to the abnormal voltage input.
The input protection circuit described above cannot protect the MOS integrated circuit sufficiently against the abnormal voltage input if it is like a surge-voltage input, as shown in FIG. 6, whose level sharply rises and whose pulse width only corresponds to a few nano seconds. This is because the input protection circuit has a limit in high-speed response. Specifically, in the transient state where some electric component is turned on so that the electric current is released, the voltage-clamping function cannot work; hence, in some cases, a potential increase at the gate of the MOS transistor cannot be avoided. If this transient gate-potential increase exceeds a certain level, destruction is initiated on the oxide film of the gate of the MOS transistor.